The present invention relates to semiconductor device techniques, and more particularly, to a technique effectively applied to a semiconductor device that includes a non-volatile memory and a capacitive element on a semiconductor substrate.
A semiconductor device including a non-volatile memory on a semiconductor substrate is described in, for example, Japanese Unexamined Patent Application Publication No. 2014-49735 (Patent Document 1), which discloses the following structure. That is, a pair of capacitor electrodes of the capacitive element is formed by a polysilicon film for a control gate and a polysilicon film for a memory gate in a Metal Oxide Nitride Oxide Semiconductor (MONOS) memory. The paired capacitor electrodes are arranged adjacent to each other along a main surface of the semiconductor substrate via a SiO2/SiN/SiO2 (ONO) film of the MONOS memory.